1 idtqs74fct253at high-speed cmos dual 4-input multiplexer industrial temperature range march 2001 2001 integrated device technology, inc. dsc-5873/- c idtqs74fct253at industrial temperature range high-speed cmos dual 4-input multiplexer description: the idtqs74fct253at is a high-speed cmos ttl-compatible dual 4-input multiplexer with 3-state outputs. all inputs have clamp diodes for undershoot noise suppression. all outputs have ground bounce suppres- sion. outputs will not load an active bus when vcc is removed from the device. functional block diagram ya eb yb ea s1 s0 i0a i1a i2a i3a i0b i1b i2b i3b features: - cmos power levels: <7.5mw static - undershoot clamp diodes on all inputs - true ttl input and output compatibility - ground bounce controlled outputs - reduced output swing of 0 to 3.5v - i ol = 48ma - available in soic and qsop packages
2 industrial temperature range idtqs74fct253at high-speed cmos dual 4-input multiplexer pin configuration soic/ qsop top view so16-1 so16-7 so16-8 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 ea s 1 gnd ya i 1a i 0a i 3a eb s 0 i 3b i 2b i 1b i 0b yb v cc i 2a absolute maximum ratings (1) symbol description max. unit v term terminal voltage with respect to gnd C 0.5 to +7 v t stg storage temperature C 65 to +150 c i out dc output current max sink current/pin 120 ma i ik input diode current, v in < 0 C 20 ma i ok output diode current, v out < 0 C 50 ma fct l note: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. capacitance (t a = +25 o c, f = 1.0mhz) symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 4 pf c out output capacitance v out = 0v 8 pf fct_2 note: 1. this parameter is measured at characterization but not tested. pin description pin names i/o description i 0 - i 7 i data in s 0 - s 1 i select ea , eb i enable ya, yb 0 data out function table (1) enable select outputs ea eb s1 s0 ya yb function h x x x z z disable a x h x x x z disable b lllli 0 ai 0 bs 1 - 0 = 0 lllhi 1 ai 1 bs 1 - 0 = 1 llhli 2 ai 2 bs 1 - 0 = 2 llhh i 3 ai 3 b s 1 - 0 = 3 note: 1. h = high volta g e level l = low volta g e level x = dont care z = hi g h-impedance
3 idtqs74fct253at high-speed cmos dual 4-input multiplexer industrial temperature range power supply characteristics following conditions apply unless otherwise specified: industrial: t a = -40c to +85c, v cc = 5.0v 5% symbol parameter test conditions (1) min. max. unit i cc quiescent power supply current v cc = max. freq = 0 0v v in 0.2v or vcc-0.2v v in vcc 1.5ma d i cc supply current per input ttl inputs high v cc = max. v in = 3.4v (2) freq = 0 2ma i ccd supply current per input per mhz v cc = max. outputs open and enabled one bit toggling 50% duty cycle other inputs at gnd or vcc (3,4) 0.25 ma/mhz fctl notes: 1. for conditions shown as min. or max., use the appropriate values specified under dc electrical characteristics. 2. per tll driven input (v in = 3.4v). 3. for flip-flops, i ccd is measured by switching one of the data input pins so that the output changes every clock cycle. this is a measurement of device power consumption only and does not include power to drive load capacitance or tester capacitance. 4. i c = i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current d i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an output transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz. dc electrical characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = -40c to +85c, v cc = 5.0v 5% symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level guaranteed logic high level 2 v v il input low level guaranteed logic low level 0.8 v d v t input hysteresis v tlh - v thl for all inputs 0.2 v i ih input high current v cc = max. 0 v in < vcc 5a i il input low current i oz off-state output current (hi-z) v cc = max. 0 v in vcc 5a i os short circuit current v cc = max., v out = gnd (2) -60 ma v ic input clamp voltage v cc = min., i in = C18ma, t a = 25 c (2) C0.7 C1.2 v v oh output high voltage v cc = min. i oh = -15ma 2.4 v v ol output low voltage v cc = min. i ol = 48ma 0.5 v notes: 1. typical values are at v cc = 5.0v, t a = 25c. 2. this parameter is guaranteed but not tested.
4 industrial temperature range idtqs74fct253at high-speed cmos dual 4-input multiplexer switching characteristics over operating range (1) symbol parameter (2) min. max. unit t iy propagation delay in to y 1.5 5.2 ns t sy propagation delay sn to y 1.5 6.6 ns t pzh t pzl output enable time e to y 1.5 6 ns t phz t plz output enable time e to y (3) 1.5 6 ns notes: 1. c load = 50pf, r load = 500 w unless otherwise noted. 2. minimums guaranteed but not tested. 3. this parameter is guaranteed by design but not tested.
5 idtqs74fct253at high-speed cmos dual 4-input multiplexer industrial temperature range pulse generator r t d.u.t. v cc v in c l v out 50pf 500 w 500 w 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh preset clear clock enable etc. fctl link fctl link fctl link fctl link fctl link test cir cuits and w a veforms propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times pulse width switch position test switch open drain disable low closed enable low all other tests open fctl definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 10mhz; zo 50 w; t f 2.5ns; t r 2.5ns.
6 industrial temperature range idtqs74fct253at high-speed cmos dual 4-input multiplexer corporate headquarters for sales: 2975 stender way 800-345-7015 or 408-727-6116 santa clara, ca 95054 fax: 408-492-8674 www.idt.com* *to search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. the idt logo is a registered trademark of integrated device technology, inc. ordering information idtqs xx fct xxxx xx package device type so q s1 small outline ic (gull wing) (so16-1) quarter size small outline package (so16-7) small outline ic (gull wing) (so16-8) high-speed cmos dual 4-input multiplexer 253at temp. range 74 C40c to +85c
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